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SX Embedded Controller Registers

Data Memory / File Registers

The data memory is a RAM-based register set consisting of general-purpose registers and dedicated-purpose registers. The number of registers depends on the SX device type. The SX18/20/28AC and SX18/20/28AC75 devices have 136 general-purpose registers and eight dedicated-purpose registers. The SX48/52BD has 262 general-purpose registers and ten dedicated-purpose registers. All of these registers are eight bits wide. The registers are organized into banks, allowing the SX instructions to address the registers using just five bits of the 12-bit instruction opcode.

Because the registers are organized into banks or “files,” these memory-mapped registers are called “file registers.” In the descriptions of the SX instructions in Chapter 3, the abbreviation “fr” represents a 5-bit register selection value encoded into the instruction opcode.

See:

Bank 0 Bank1 Bank 2 Bank 3 Bank 4 Bank 5 Bank 6 Bank 7
00 IND IND IND IND IND IND IND IND
01 RTCC/W RTCC/W RTCC/W RTCC/W RTCC/W RTCC/W RTCC/W RTCC/W
02 PC PC PC PC PC PC PC PC
03 STATUS STATUS STATUS STATUS STATUS STATUS STATUS STATUS
04 FSR FSR FSR FSR FSR FSR FSR FSR
05 RA RA RA RA RA RA RA RA
06 RB RB RB RB RB RB RB RB
07 RC RC RC RC RC RC RC RC
08 08 08 08 08 08 08 08 08
09 09 09 09 09 09 09 09 09
0A 0A 0A 0A 0A 0A 0A 0A 0A
0B 0B 0B 0B 0B 0B 0B 0B 0B
0C 0C 0C 0C 0C 0C 0C 0C 0C
0D 0D 0D 0D 0D 0D 0D 0D 0D
0E 0E 0E 0E 0E 0E 0E 0E 0E
0F 0F 0F 0F 0F 0F 0F 0F 0F
11 11 31 51 71 91 B1 D1 F1
12 12 32 52 72 92 B2 D2 F2
13 13 33 53 73 93 B3 D3 F3
14 14 34 54 74 94 B4 D4 F4
15 15 35 55 75 95 B5 D5 F5
16 16 36 56 76 96 B6 D6 F6
17 17 37 57 77 97 B7 D7 F7
18 18 38 58 78 98 B8 D8 F8
19 19 39 59 79 99 B9 D9 F9
1A 1A 3A 5A 7A 9A BA DA FA
1B 1B 3B 5B 7B 9B BB DB FB
1C 1C 3C 5C 7C 9C BC DC FC
1D 1D 3D 5D 7D 9D BD DD FD
1E 1E 3E 5E 7E 9E BE DE FE
1F 1F 3F 5F 7F 9F BF DF FF

Comments:

See also:


file: /Techref/scenix/reg/file.htm, 7KB, , updated: 2009/3/15 09:57, local time: 2017/11/20 00:02, owner: CS-interfree-,
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