Mnemonic, Description Cycles Status 12-Bit Opcode Operands /Turbo Affected MSB LSB Notes =============================================================================================== NOP - No Operation 1 None 0000 0000 0000 GetOption Moves OPTION register to W 1 ? 0000 0000 0001 OPTION k Load OPTION register with W 1 None 0000 0000 0010 SLEEP - Power down WDT=0, Pre=0, TO=1, PD=0 1 TO,PD 0000 0000 0011 CLRWDT k Clear Watchdog Timer 1 TO,PD 0000 0000 0100 TRIS f Move W into Port Control Register 1 None 0000 0000 0fff 3 0000 0000 10xx 4 unknowns RET - Return without affecting W 2/3 None 0000 0000 1100 RETP - Ret, W unchanged, Pop PA2,PA1,PA0 2/3 PA2/1/0 0000 0000 1101 RETI - Ret fr int. Pop PC, W, STATUS, FSR 2/3 All but TO,PD 0000 0000 1110 RETIW - RETI and add W to RTCC 2/3 All but TO,PD 0000 0000 1111 PAGE n Write n into PA2, PA1 and PA0 1 PA2/1/0 0000 0001 0nnn 5 BANK n Write n into FSR7, FSR6 and FSR5 1 None 0000 0001 1nnn 5 MOVWF f Move W to f 1 None 0000 001f ffff 1,4 CLRW - Clear W 1 Z 0000 0100 0000 IREAD - Read word at (MODE:W) into MODE:W 1/4 None 0000 0100 0001 MOVMW - Read MODE bits into W. (Hi nib=0) 1 None 0000 0100 0010 MOVWM - Write W into MODE register 1 None 0000 0100 0011 Debug - Puts SX into debug mode 1 ? 0000 0100 0100 secret OscIO - Rotates OSC pin through W 1 ? 0000 0100 0101 secret SetBreak Sets the break point register 1 ? 0000 0100 0110 secret 0000 0100 0111 unknown PushW - Push W to W stack 1 ? 0000 0100 1000 secret PushSTAT- Push W to the Status stack 1 ? 0000 0100 1001 secret PushFSR - Push W to the FSR stack 1 ? 0000 0100 1010 secret FIFO - W is cycled thru an 8 level FIFO 1 ? 0000 0100 1011 secret PopW - Pop W from the W stack 1 ? 0000 0100 1100 secret PopSTAT - Pop Status from the W stack 1 ? 0000 0100 1101 secret PopFSR - Pop W from the FSR stack 1 ? 0000 0100 1110 secret 0000 0100 1111 unknown MODE n Write n into MODE register 1 None 0000 0101 nnnn CLRF f Clear f 1 Z 0000 011f ffff 4 SUBWF f,d Subtract W from f (Different on SX) 1 C,DC,Z 0000 10df ffff 1,2,4 DECF f,d Decrement f 1 Z 0000 11df ffff 2,4 IORWF f,d Inclusive OR W with f 1 Z 0001 00df ffff 2,4 ANDWF f,d AND W with f 1 Z 0001 01df ffff 2,4 XORWF f,d Exclusive OR W with f 1 Z 0001 10df ffff 2,4 ADDWF f,d Add W and f 1 C,DC,Z 0001 11df ffff 1,2,4 MOVF f,d Move f 1 Z 0010 00df ffff 2,4 COMF f,d Complement f 1 Z 0010 01df ffff INCF f,d Increment f 1 Z 0010 10df ffff 2,4 DECFSZ f,d Decrement f, Skip if 0 1(2) None 0010 11df ffff 2,4 RRF f,d Rotate right f through Carry 1 C 0011 00df ffff 2,4 RLF f,d Rotate left f through Carry 1 C 0011 01df ffff 2,4 SWAPF f,d Swap f 1 None 0011 10df ffff 2,4 INCFSZ f,d Increment f, Skip if 0 1(2) None 0011 11df ffff 2,4 BCF f,b Bit Clear f 1 None 0100 bbbf ffff 2,4 BSF f,b Bit Set f 1 None 0101 bbbf ffff 2,4 BTFSC f,b Bit Test f, Skip if Clear 1(2) None 0110 bbbf ffff BTFSS f,b Bit Test f, Skip if Set 1(2) None 0111 bbbf ffff RETLW k Return (fr subr) move Literal to W 2/3 None 1000 kkkk kkkk CALL k Call subroutine 2/3 None 1001 kkkk kkkk 1 GOTO k Unconditional branch 2/3 None 101k kkkk kkkk MOVLW k Move Literal to W 1 None 1100 kkkk kkkk IORLW k Inclusive OR Literal with W 1 Z 1101 kkkk kkkk ANDLW k AND Literal with W 1 Z 1110 kkkk kkkk XORLW k Exclusive OR Literal to W 1 Z 1111 kkkk kkkk
Notes:
Abbreviations:
b = bit 0..7 in f C = carry status bit d = destination: W or f (d=0 for W, d=1 for f) DC = digit carry status bit FSR = file select register f = file register (RAM) k = 8-bit constant (literal) (256) n = constant PA = page select status bits (n = 0,1,2) PD = power-down (sleep-mode) status bit (true low) TO = watchdog timer time-out status bit (true low) W = working register (accumulator) Z = zero status bit
file: /Techref/scenix/opcodes.htm, 8KB, , updated: 2005/2/4 18:02, local time: 2024/12/23 03:05,
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