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PICList Thread
'sending break out 16c74 serial port'
1997\03\18@151406 by Harold Hallikainen

picon face
Hello again!

       I now need to send serial data with 1 start, 8 data and 2 stop
bits.  I figure I'll set the transmitter for 9 data bits and set the msb
to a 1 to get the 2 stop bits.  But, I need to send a break that has the
same timing as two bytes (22 bit times).  I don't see a break feature in
the datasheet.  It seems that I SHOULD be able to tell the port that bit
is a normal port bit instead of the serial transmitter output, but it
looks like that's controlled by SPEN, which enables BOTH the transmitter
and receiver, and I want to keep the receiver going.
       Checking further, page 2-604 of the 95/96 PIC data book indicates
that clearing TXEN will reset the transmitter "the TX bit will revert to
high impedance."  I'm guessing that the pin is STILL not connected to the
output latch, but is just kinda floating.  True?  I COULD add a pull-down
resistor to pull the line down when I disable the transmitter, yielding a
break, but since the ideal design has zero parts, adding a resistor moves
us away from that ideal.
       Any other ideas?



1997\03\18@184805 by Andy Kunz

>break, but since the ideal design has zero parts, adding a resistor moves
>us away from that ideal.


The ideal design also lacks a CPU.  And NRE on the software.  Tell the bean
counters to grin and bear it.  I don't think the penny it costs to add a
resistor is going to hurt their bottom line that badly.  Especially when
GND and TXD are so close together pad-wise.

Have you tried setting RC.6 to 0 and not letting the TX side say anything
for 22 bit times?


Andy Kunz - Montana Design - 409 S 6th St - Phillipsburg, NJ 08865
         Hardware & Software for Industry & R/C Hobbies
       "Go fast, turn right, and keep the wet side down!"

1997\03\18@215023 by Harold Hallikainen

picon face
       Thanks for the note...  The ideal design having zero parts is
pretty much my idea.  I compare this to "brute force engineering" where
we throw parts at the design until it works.  I finally figured that I
should add the resistor between the serial output and the RS422 driver.
I also tie RC4 to the line after the resistor.  I can then force the data
high or low, or tristate RC4 letting the serial data go through.  This
also works out nicely because I can use the serial transmitter for timing
the break.  Would've been nice to have the break capability in the chip,
but as you point out, the resistor isn't THAT expensive...

>Have you tried setting RC.6 to 0 and not letting the TX side say
>for 22 bit times?

       RC6 uses SPEN to determine whether the pin is driven by the
output latch or the serial port.  So, if the serial port is enabled (and
I need to keep the receive side running), the pin is driven by the serial
port and ignores the settings of the output latch.  I also tried dumping
a 0x00 into the TxReg and waiting for RC6 to go low (we can still read
the state of the pin), then clearing TXEN, which, according to the block
diagram, should kill the clock to the serial port shift register, leaving
the line low.  However, as pointed out in section 12.2.1, "Clearing TXEN
... will reset the transmitter as a result the TX pin will revert to
hi-impedance."  My checks indicate that the line just goes high and stays
there.  So... that didn't solve it.  I added the resistor!
       Again, thanks for the comments!


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