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'programming generic array logic (GAL)'
1998\01\15@154145 by Bill (WL) Boulton

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To the best information resource on the net,

I've been tossing around the idea of building my own GAL programmer for
16V8s and 20V8s, BUT!  It seems that the people who make them (NS & SGS
Thompson) are keeping the programming specs a secret (lots o' money maybe).
I've found bits of info but no where near enough to actually do anything
other than increase curiosity and frustration.

I don't want to buy someone elses locked up code.  I'll do it myself so I
can (fix.modify.expand) it.  I've spent my last dollar on apps that were
not as good as they were crached up to be.

Any help would be greatly appreciated,

Bill.

1998\01\15@175900 by Martin R. Green

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This is the same problem I had many years ago.  You are correct, the
GAL makers guard the programming specs like their life depends on it.
In fact, they have a good reason for this, programmer vendors quoting
a particular device compatibility must submit their programmer designs
for "certification" to ensure they reliably adhere to the programming
spec.  This allows the GAL manufacturers to avoid heaps of calls from
small time developers complaining that their devices won't take a
program, when in fact, it is the fault of a "cheapie" programmer.  I
believe they will not honour their guarantee if you try to program the
GAL on a non-certified programmer.  Since each brand of GAL programs
differently, even for the same device number, you are probably best
off using a universal programmer that supports the devices you are
interested in (I own a Needham's EMP20, highly recommended!).

With that said, several electronics magazines have published GAL
programmer designs over the years, including, but not limited to,
Radio-Electronics (now Electronics Now), and Elektor, but typically
the range of devices supported are limited.  The R-E programmer for
instance only worked with 16V8 and 20V8 devices, and most notably, NOT
with the popular 22V10 device.  If you are willing to work with a
limited range of GAL's, there are inexpensive alternatives, but like I
said, the best solution is a universal programmer like the EMP20.

Incidentally, despite the fact that it was probably 10 years ago, I
still vividly remember a suggestion from the R-E article.  To get
programming specs out of companies like Lattice, etc, send them a
letter on company letterhead explaining that you are designing a
universal programmer.  They may ask you to sign a non-disclosure
agreement, but you might just get the info you are looking for.

CIAO - Martin.

On Thu, 15 Jan 1998 15:41:45 -0500, "Bill (WL) Boulton"
<spam_OUTbill-794TakeThisOuTspamWINSHOP.COM.AU> wrote:

{Quote hidden}

Martin R. Green
.....elimarKILLspamspam@spam@NOSPAMbigfoot.com

To reply, remove the NOSPAM from the return address.
Stamp out SPAM everywhere!!!

1998\01\16@004505 by John Payson

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> I've been tossing around the idea of building my own GAL programmer for
> 16V8s and 20V8s, BUT!  It seems that the people who make them (NS & SGS
> Thompson) are keeping the programming specs a secret (lots o' money maybe).
> I've found bits of info but no where near enough to actually do anything
> other than increase curiosity and frustration.

I agree that this situation can be at times frustrating; the problem, though,
oddly enough is not that the semiconductor manufacturers are scared about
other companies stealing their code, but that they're concerned about either:

[1] Having lots of hobbyists taking up the time of their engineers; it's
   not that the companies are trying to be mean to hobbyists, but having
   a $40/hour engineer spend half an hour on each hobbyist who may buy
   perhaps $50 (retail) worth of parts is, frankly, not cost effective.

[2] Devices which are programmed improperly may fail in use, perhaps after
   many hours of service.  Chip vendors do not want any headaches or bad
   reputations that could come from such device failures.  Compared to
   microcontrollers and xxROM chips, many PLD's are downright touchy in
   their programming specifications.

[3] Manufacturers sometimes change the programming requirements for GALs
   and PLD's slightly, even without changing the part number.  In such
   cases, the variable details of the specification will usually be coded
   within the device and readable by the programmer.  The flexibility to
   change the specifications allows manufacturers to make improvements in
   their manufacturing process, but a hobbyist's programmer which, e.g.,
   uses a 4ms programming pulse because that's what lot#99223 required
   may slag chips if it doesn't read the required pulse duration from
   each device.

[4] Chip manufacturers who do make significant changes to programming requ-
   irements (even ones they've documented in advance that they MIGHT make)
   will notify programmer manufacturers so that they can ensure that the
   programmers in fact continue to work with the new devices.  If there are
   20 certified programmer vendors, this is practical.  If there are 500
   vendors selling development programmers, this becomes a nightmare.

[5] For most programmable logic families, there are devices available from
   selected manufacturers which are, in fact, easily programmable by well-
   documented means.  The 22V10isp from Lattice is an excellent example.
   Such chips cost more, because manufacturers are either limitted in the
   process improvements they can pursue, or else because they have to add
   more circuitry to the chip to aid in programming.  On the other hand,
   for small hobbyists, dollar or two per chip is often a non-issue.

Note that some of these issues occur in other types of devices entirely.
For example, a company of a popular PC peripheral made hardware specifica-
tions available for free to anyone who agreed to the following (from mem-
ory):

[1] The recipient could use the information in his/her own compiled soft-
   ware, and could release such software, but could not release the soft-
   ware in source-code form or otherwise reveal how the hardware was
   programmed.

[2] The recipient would not bother the company's tech-support people for
   any assistance regarding the information provided.

[3] The vendor was under no obligation to continue to have their hardware
   work the same way, and that he/she would add a disclaimer to any rel-
   eased software to that effect.

If a PC hardware vendor puts on those restrictions, it's reasonable to see
why a GAL vendor would be equally paranoid...

1998\01\16@024222 by Leon Heller

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In message <3.0.3.16.19980115192719.216f8fecspamKILLspammail.winshop.com.au>, "Bill
(WL) Boulton" <.....bill-794KILLspamspam.....WINSHOP.COM.AU> writes
>To the best information resource on the net,
>
>I've been tossing around the idea of building my own GAL programmer for
>16V8s and 20V8s, BUT!  It seems that the people who make them (NS & SGS
>Thompson) are keeping the programming specs a secret (lots o' money maybe).
>I've found bits of info but no where near enough to actually do anything
>other than increase curiosity and frustration.
>
>I don't want to buy someone elses locked up code.  I'll do it myself so I
>can (fix.modify.expand) it.  I've spent my last dollar on apps that were
>not as good as they were crached up to be.
>
>Any help would be greatly appreciated,
>
>Bill.

Lattice (they invented the GAL) gives away development and programming
software for their 22V10 ispGAL and other smaller isp CPLD parts on a
free CD-ROM. You use a simple in-circuit programming cable connected to
the PC printer port. I have a Lattice Starter Kit which includes the
cable, software and sample devices. They are quite cheap.

Leon
--
Leon Heller: EraseMEleonspam_OUTspamTakeThisOuTlfheller.demon.co.uk http://www.lfheller.demon.co.uk
Amateur Radio Callsign G1HSM    Tel: +44 (0) 118 947 1424
See http://www.lfheller.demon.co.uk/dds.htm for details of my AD9850
DDS system - schematic and software.

1998\01\16@050324 by wwl

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On Thu, 15 Jan 1998 15:41:45 -0500, you wrote:

>To the best information resource on the net,
>
>I've been tossing around the idea of building my own GAL programmer for
>16V8s and 20V8s, BUT!  It seems that the people who make them (NS & SGS
>Thompson) are keeping the programming specs a secret (lots o' money maybe).
I think the main reason for this  is to avoid bad programmer designs
programming parts unreliably, giving the chips a bad rep.  The only
PLD programming specs I've ever seen are the old TI bipolars, and
Cypress' early eprom devices.
    ____                                                           ____
  _/ L_/  Mike Harrison / White Wing Logic / wwlspamspam_OUTnetcomuk.co.uk  _/ L_/
_/ W_/  Hardware & Software design / PCB Design / Consultancy  _/ W_/
/_W_/  Industrial / Computer Peripherals / Hazardous Area      /_W_/

1998\01\16@081711 by Keith Howell

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I agree with the comments made about manufacturers not wanting a lot of
amateur device programmers about.

The problem seems to be one of their own making, i.e. a proliferation of
programming methods. You don't get the same problems putting data into RAM
chips, and EPROM programming algorithms are reasonably well documented.

Elektor did a GAL programmer that did a few types of 16V8 and 20V8.
It's 100x160 Eurocard, but the stupid placement of the LPT connector
means it can't slide into any Eurorack.
It has an on-board PSU (groan)
The I/O is done by a few cheap 4094 shift registers (minimises PCB tracks).
I built it, and bought the Elektor software disk (#15) - total cost c. #50
They then published a kludge board for 22V10s.
And wanted me to buy another disk (#15!)
They passed on my request for the Pascal source code to the author,
but I guess he is in the same position as the GAL maufacturers.

I made it when I had spare time and no job.
I then found a job and have no spare time for hobby electronics.
So it's just filling my junk box.

>From industrial experience, I found 22V10s are much more available
as producers feel less demand for smaller chips. Even if the logic
could fit in a 16V8, I'd layout the PCB for a 22V10 because someone
always asks for more at some stupid late stage in the design!

Try the Lattice chips. They're meant to be in-site programmable,
so they have to be quite open about programming so that people
can get their production jigs to program them.

Why not make a general-purpose parallel I/O port and PSU outlet.
With a standard connector like the Arcom Control Systems
signal conditioning bus connector (50-way IDC). Or opto-22.

Then you'd have a far more useful gadget which you could make
separate plug-in boards for:
- GAL programming
- EPROM programming
- Flash ROM programming
- I2C bus EEPROMs
- Smart cards
- PIC chips
- any thing you have yet to think of.
You'd also be able to use any of Arcom's off-the shelf
signal conditioning boards for opto-isolated switching of mains,
relays, etc. Why re-invent the wheel?

TTFN, KH

1998\01\16@202339 by Bill (WL) Boulton

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To all the people who responded on this thread,

Thanks heaps to all. It's greatly appreciated.

Bill

1998\01\17@215434 by Tom Handley

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  Keith, I designed a Lattice ispLSI1016-based chip that implements
common microprocessor signals and a 19 Bit address bus. It connects
to PC bidirectional parallel ports where the control register, bit 5,
controls the direction. It does require an external 74xx245 bus
transceiver. I've used it for a variety of projects from interfacing A/Ds
to loading a Dallas 512K NVSRAM/Clock with math tables for my PIC-based
weather station. I intend to put it up on my `seriously in need of update'
web page soon. The following is a `snippet' from the spec:

  - Tom

----------
Generates:

 !CS ---------- !CS Chip Select
 !RD ---------- !RD Read Data
 !WD ---------- !WD Write Data
  DIR --------- Data Direction for External Bus Buffer. 1 = Read (R/W)
  HBEN -------- High Byte Enable
  A0 -> A18 --- 19 Bit Address

States:

 State   S2 S1 S0   Action
 -----------------------------------------------------------
     0    0  0  0   !RD    Generates !CS             DIR = 1
     1    0  0  1   !WD    Generates !CS             DIR = 0
     2    0  1  0   LE0    A0  -> A7  Latch Enable   DIR = 0
     3    0  1  1   LE1    A8  -> A15 Latch Enable   DIR = 0
     4    1  0  0   LE2    A16 -> A18 Latch Enable   DIR = 0
     5    1  0  1   HBEN   Latches HBEN from D0      DIR = 0

PC Parallel Port, FPGA Input/Output Interface:

 DB25         FPGA            PC Control             FPGA Outputs
 ---------------------------------------             ---------------
  1 STRB     *14 SEL IN  3    !C0                    !CS   25 I/O  8
  2 D0        15 D0  I/O 0                           !RD   26 I/O  9
  3 D1        16 D1  I/O 1                           !WD   27 I/O 10
  4 D2        17 D2  I/O 2                            DIR  28 I/O 11
  5 D3        18 D3  I/O 3                            HBEN 29 I/O 12
  6 D4        19 D4  I/O 4                            A0   10 I/O 31
  7 D5        20 D5  I/O 5                            A1    9 I/O 30
  8 D6        21 D6  I/O 6                            A2    8 I/O 29
  9 D7        22 D7  I/O 7                            A3    7 I/O 28
 14 AutoFd   *24 S0  IN  0    !C1                     A4    6 I/O 27
 16 Init     *36 S1  IN  1     C2                     A5    5 I/O 26
 17 Select   * 2 S2  IN  2    !C3                     A6    4 I/O 25
 18 GND                                               A7    3 I/O 24
                                                      A8   44 I/O 23
* pDS Router assigned these Pins                       A9   43 I/O 22
                                                      A10  42 I/O 21
                                                      A11  41 I/O 20
                                                      A12  40 I/O 19
                                                      A13  39 I/O 18
FPGA Power:                                            A14  38 I/O 17
                                                      A15  37 I/O 16
  1,23 GND                                            A16  32 I/O 15
 12,34 Vcc                                            A17  31 I/O 14
                                                      A18  30 I/O 13

At 01:10 PM 1/16/98 +0000, you wrote:
[snip]
{Quote hidden}

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