'bit banged serial receive routines'
|G'day to all.
I'm about to start a project where I need serial receive on a pic without
onboard UART and was wondering if anyone had favourite routines they would
be willing to share. I'm looking at 9600 baud or slower and have to check
for reception at any time - this means I'll be either calling the routine
repeatedly or interspersing the 'check start bit' tests throughout my code.
I've looked at the app note routines but still want to glean what I can from
others that have solved real world problems.
John Payson wrote about a neat concept some while back - sampling at 3X data
rate and using a long shift register to accumulate the samples. Sounds
neat, John - how well does it handle speed errors? When testing for the end
of the byte (100 at the start, xx1 at the end), what do you do when the
start sample has shifted to the test point in the SR chain but the ending
'xx1' isn't? Do you check for 'x10' or 'xxx 1' and adjust the data bit
sample locations accordingly?
I'm also comtemplating a sampling routine similar to what Scott Dattalo
helped me with a year back or so - it would actually be my first choice if I
was trying to achieve 38K or higher data rates.
This little critter also has to generate continous PWM. The approach I'm
leaning towards is to inline the RX routine, TX routine, PWM into one large
loop that runs as the main task. Of course, since most of my previous
projects put all the house keeping stuff into the background routine, I
don't have any working 'templates' to start from. This project is starting
with from a clean piece of paper.
I'm open to any suggestions or ideas. Thanks!
Dwayne Reid <planet.eon.net> dwayner
Trinity Electronics Systems Ltd Edmonton, AB, CANADA
(780) 489-3199 voice (780) 487-6397 fax
Celebrating 15 years of Engineering Innovation (1984 - 1999)
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> I'm open to any suggestions or ideas. Thanks!
Playing the heretic here, this would be trivial on an AVR, possibly even the
I've done bit-banged serial on the 84, using an int on the start bit to get
me into listening. It worked well at 9600. The idea was to use single
samples at the center of the bit times, based on the edge of the start bit.
The timer was used to trigger the subsequent samples.
Lots of effort though, for what would all (including your PWM) be handled in
the background, almost codeless, on the AVR.
|On Wed, 21 Apr 1999, Dwayne Reid wrote:
Why do you get all of the fun projects?
One of the difficulties that I can see right off hand is that you have two
periodic tasks that are not harmonically related. One's the UART the other
is the PWM. (I'm assuming that the PWM is an all software one - If it
isn't and you're not concerned about cost then you'd be better off with a
PIC that supports both in hardware. Unless there's something else I don't
know about.) It would probably make most sense to make the pwm synchronous
with the PIC's cpu clock (i.e. run it as fast as possible) and adjust the
timing for the UART using phase accumulators. I don't have a complete
solution available, however you may wish to investigate my all software
This routine works on a 12-bit or 14-bit core and has single instruction
cycle resolution. There are 256 pwm steps and the shortest step can be one
instruction cycle. On a pic with a 20Mhz clock, the pwm frequency is
20e6 / 4 / 256 = 19531.25 Hz
This is about twice the frequency of 9600 baud.
There's roughly 145 cycles out of the 256 available for other things (like
the UART). It also possible to sample the UART twice per pass through the
PWM loop and have an effect 4x sample rate. In either case there will be
some jitter in sampling time, although I don't think that this would be a
problem (certainly not on the receive).
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