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PICList Thread
'Variable Clock Speed'
1999\03\11@224307 by Wagner Lipnharski

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Based on the fact that any switching electronic circuit
consumes current when changing electronic level (state),
it explains why a higher clock microprocessor consumes
more current than running a lower frequency clock.

Does anybody already made some experiments using two
clocks at a PIC?  Using a port pin you can select one
of two different oscillator frequencies, and reduce the
power consume while doing non important things or when
a non fast processing is required.

I am not talking about sleep or power off modes, I mean
to keep the processor running doing something useful
but able to "floor it" (speed up) when requested by
some interrupt routine or something like that.

Any experiences at all?
--------------------------------------------------------
Wagner Lipnharski - UST Research Inc. - Orlando, Florida
Forum and microcontroller web site:   http:/http://www.ustr.net
Microcontrollers Survey:  http://www.ustr.net/tellme.htm

1999\03\12@013926 by Mark Willis

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I know I've seen this done;  Hmmm...  Don't see the binder it's in,
right now.  (Need to get that in the machine here!)

 I know you can change the effective R in an RC clocked PIC - That DC &
up clock speed is sure handy here <G>  R #2 from RC junction to port
pin, output a High for "Fast" mode, Tri-state the pin for slow mode
(costs you some power though.)  Should be a better way.  Aah.  Also
could use a digital potentiometer, THAT would be a smoother move.

 Also, could change the divisor on a frequency divisor IC, using an
external clock oscillator, use a PIC pin to change the divisor.

 But the way I saw it done was IIRC even sneakier <G>  Might have been
in a Microchip Seminar?

 Mark

Wagner Lipnharski wrote:
{Quote hidden}

1999\03\12@015833 by Wagner Lipnharski

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Mark Willis wrote:
{Quote hidden}

Well, it can be done for sure, I used it with a 8051.
The question is how you guys implemented, if any, this
solution with PIC.  Questions:

1) It worths the power savings?
2) Is there any other possible solutions other than
  an external digital clock selection?
3) PICs can run down as 10kHz without any problem?
--------------------------------------------------------
Wagner Lipnharski - UST Research Inc. - Orlando, Florida
Forum and microcontroller web site:   http:/http://www.ustr.net
Microcontrollers Survey:  http://www.ustr.net/tellme.htm

1999\03\12@065506 by Harrison Cooper

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In several of my designs (non-pic mind you), I switch between two clocks
routinely.  One is used for what might be considered similar to JTAG, and
the other is standard run mode.  Just mux between them.  But, you should
probably have some sort of routine that it drops into when you switch, that
would allow the clocks to settle before going back to execute the code.
Some devices will switch with no delay between them, some will have some
settle jitter, so it depends on what you choose to mux.  I've used IDT 805
parts with pretty good success.

Cypress also makes a programmable clock, with dual outputs and can switch
(supposedly, I don't use it in that mode) between both frequencies.

Now...for the bottom line, are you trying to cut down on power consumption?
By adding an external device to swap clocks, and dual clocks (or divider for
one master), may take just as much power as to run a chip at a higher clock
all the time.

1999\03\12@112255 by Wagner Lipnharski

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Harrison Cooper wrote:
> Now...for the bottom line, are you trying to cut down on power consumption?
> By adding an external device to swap clocks, and dual clocks (or divider for
> one master), may take just as much power as to run a chip at a higher clock
> all the time.

Not really, a PLL can be tuned to some crystal harmonic, so a 1MHz
oscillator
can generate a higher clock (when necessary), if not, everything will
run
at low clock. All of this *if* a stability clock is requested. If not, a
simple RC controllable oscillator can do a nice job.
--------------------------------------------------------
Wagner Lipnharski - UST Research Inc. - Orlando, Florida
Forum and microcontroller web site:   http:/http://www.ustr.net
Microcontrollers Survey:  http://www.ustr.net/tellme.htm

1999\03\12@112736 by Dave VanHorn

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>Not really, a PLL can be tuned to some crystal harmonic, so a 1MHz
>oscillator
>can generate a higher clock (when necessary), if not, everything will
>run
>at low clock. All of this *if* a stability clock is requested. If
not, a
>simple RC controllable oscillator can do a nice job.



Depending on the PLL chip, and the size of the "steps" you want, you
can get well up into the GHz with a modest 1-20MHz reference osc.

The VCO is divided down by some number, and compared with the
reference, which is divided by another number.. Have a look in the SW
at http://www.natsemi.com  they have a pretty good tutorial.

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