I'm thinking of using a GP transistor (BC548) to disable the OSC1 input
which will be using a 4MHz crystal.
Does anyone know, before I actually prototype the circuit, if the
capacitance of the transistor in the OFF state will upset the crystal
I can't seem to find any data for the capacitances between CBE.
I found a reference to 'Cob = 8pf', but I don't know what it means.
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