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'Sample code for static ram chips?'
2000\03\24@230812 by John Hansen

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<x-flowed>I know this is a dumb question, but can someone point me toward some sample
code for using static ram chips with PICs.  I'm attempting to interface an
HMC6264 to a 16F877.  I have the data sheet, but I'm finding it to be less
than clear.  I've also searched the PIC archive and found references to
static ram chips, but no pointers on using them.  I can't figure out, for
example, what the function of the second chip select line is.... in the
timing diagrams in the data sheet it always seems to be the inverse of the
first one.  I've seen some hardware designs that tie the second chip select
line to Vdd.  I've also run across designs that tie the chip select and
output enable lines together.  This would seem to be a good way to conserve
on PIC pins if it works.  Is there a FAQ on interfacing and programming for
these chips somewhere?

Thanks,

John Hansen

</x-flowed>

2000\03\25@044931 by Arthur Brown

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Just a quick thought on this the extra chip select lines are to help
decoding of address lines in multi chip systems.
if you are only using one chip i.e. 8bit x 8192 then you only need one
select line if you want to use more than one chip then you need to decode
the address or switch the bank address of the memory you are addressing by
your code.
If I was doing this I would start of with select chip, 1 pin of port address
of two data address's 1pin. and any of the 8 data bits 1 pin.
so for a total of 3 pins we can play with the 6264 and then add more address
lines and data lines when you know what is requiered of the ram chip.
hope this puts you onto the right line
all the best from Art  spam_OUTartbTakeThisOuTspamcableinet.co.uk

{Original Message removed}

2000\03\25@073931 by Byron A Jeff

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>
> I know this is a dumb question, but can someone point me toward some sample
> code for using static ram chips with PICs.

I'm not sure I've ever really seen any. Also it depends on how you're
interfacing the chip to the PIC.
> I'm attempting to interface an
> HMC6264 to a 16F877.

That's a standard 8Kx8 static ram IIRC. The process of access it shouldn't
be a big deal.

1) Put the address on the address lines.
2) Select R/W. If writing then place the data to be written on the data lines.
3) Enable all Chip Selects. Be sure to meet any setup times before selecting.
Also be sure to hold the line for the required amount of time. But considering
that the PIC is going to bit bang this, neither should be a problem.
4) If you are reading the Output Enable line must be active for the data to
present on the data lines.
5) Be sure that when you're not using the part that at least one CS is
deactivated. This puts the part in standby mode reducing its power consumption
greatly.

That's the basic gist. I really haven't done static ram in years simply
because PICs have enough local ram for a lot of tasks. My next memory based
project will probably use Atmel 8Mbit/16Mbit DataFlash chips.

>  I have the data sheet, but I'm finding it to be less
> than clear.  I've also searched the PIC archive and found references to
> static ram chips, but no pointers on using them.  I can't figure out, for
> example, what the function of the second chip select line is....

It selects the chip. When there are multiple CS lines all must be activated
for the chip to activate.

It was used to double the amount of memory without having to add any additional
circuitry. An 8K part has 13 address lines. If you wanted 16K you could
wire two parts in parallel, same address, same data, same RW, same primary
chip select. The only difference is you'd wire A14 to the second CS line for
one chip and invert at wire to the second CS line for the other.
So for the first half of the 16K space, one chip would be active where in the
second half, the other would activate.

> in the
> timing diagrams in the data sheet it always seems to be the inverse of the
> first one.

The other CS is typically active high where the main is active low.

> I've seen some hardware designs that tie the second chip select
> line to Vdd.

Thereby enabling it all the time. Then the main CS becomes in effect the only
CS. This is probably what you want to do.

>  I've also run across designs that tie the chip select and
> output enable lines together.  This would seem to be a good way to conserve
> on PIC pins if it works.

It does. You can also simply enable OE all the time because the chip is
inactive if the CS is delected anyway. Either works.

>  Is there a FAQ on interfacing and programming for
> these chips somewhere?

Not really. With the embedding of more and more ram directly into the
controllers, they've become a ghost of a bygone era. One place you may be
able to scrounge up some info is with some older 8031/8051 designs because
the chips used to store the programs were either EPROM or RAM based and had
to address most of these issues.

BAJ

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