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PICList Thread
'Ready for non-window pics'
1995\08\22@184517 by Mike Keitz

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Martin Kirk <spam_OUTmlkTakeThisOuTspamasu.edu> wrote:
>Hi,
>
>Will someone please give me a brief list of the requirements for clearing
>the registers when moving one's code to non-windowed pics?  I assume it
>is a simple clear all registers operation.  Please confirm.
>

AFAIK, the non-window PICs have *exactly* the same chip in them as the
window ones.  So there should be no difference in operation between one type
and the other, other than inability to erase the non-window one.

(In an earlier thread, someone noted that newer versions of the window chips
have a non-erasable code protect bit.  So if this bit is set, a windowed
chip would be non-reusable as well.  Has Microchip issued an exact statement
on this?)

If you're counting on light through the window setting the RAM (registers?)
in a certain condition, this is very bad practice, not certain to work in
any case.  It is important to design your code so it doesn't assume anything
about the state of the RAM on power-up.  The special function registers are
reset as described in the table in the data book, but the RAM is not
guaranteed to be reset to any particular state, window chip or not.

There is no single "clear all registers" instruction.  However the FAQ
contains a good example of a loop which will do it.  Depending on the number
of locations that must be cleared for your code, it may be simpler to just
use a few clrf's on the vital locations.

-Mike

1995\08\22@195937 by Paul Christenson [N3EOP]

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>Will someone please give me a brief list of the requirements for clearing
>the registers when moving one's code to non-windowed pics?  I assume it
>is a simple clear all registers operation.  Please confirm.

Simpler than that.  Simply be sure to initialize each register before you
use it.  (Don't assume that it'll be zero before it's used.)

1995\08\23@005055 by Andrew Warren

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Martin Kirk (.....mlkKILLspamspam@spam@ASU.EDU) wrote:

>Will someone please give me a brief list of the requirements for clearing
>the registers when moving one's code to non-windowed pics?  I assume it
>is a simple clear all registers operation.  Please confirm.

Martin:

For the 16C54/55/56:

   PORTA   EQU     004H

           MOVLW   PORTA       ;PREPARE TO ZERO ALL REGISTERS EXCEPT THE FSR,
           MOVWF   FSR         ;RTCC, PC, AND PROCESSOR STATUS REGISTERS.

   CLRRAM  CLRF    USEFSR           ;ZERO A REGISTER.

           INCFSZ  FSR         ;HAVE WE DONE THEM ALL?
           GOTO    CLRRAM           ;IF NOT, LOOP BACK AND ZERO ANOTHER.

For the 16C57/58:

   PORTA   EQU     004H

           MOVLW   PORTA       ;PREPARE TO ZERO ALL REGISTERS EXCEPT THE
           MOVWF   FSR         ;PROCESSOR STATUS, PC, RTCC, AND FSR
                               ;REGISTERS.

   CLRRAM  MOVLW   00011111B   ;ARE WE POINTING AT "USEFSR"?
           ANDWF   FSR,W       ;

           SKPNZ               ;IF NOT, SKIP AHEAD.

           BSF     FSR,BIT4    ;OTHERWISE, SKIP OVER THE PROCESSOR STATUS,
                               ;PC, RTCC, FSR, PORTA, PORTB, PORTC, AND
                               ;THE GLOBALLY-ACCESSIBLE FILE REGISTERS.

           CLRF    USEFSR      ;ZERO THE REGISTER AT WHICH WE'RE POINTING.

           INCFSZ  FSR         ;HAVE WE DONE THEM ALL?
           GOTO    CLRRAM      ;IF NOT, LOOP BACK AND ZERO ANOTHER.

   ; ALL FILE REGISTERS ARE ZEROED AND WE'RE IN DATA SEGMENT 0.

For the 16C71:

   GPREGS  EQU     00CH
   LASTGP  EQU     02FH

           MOVLW   GPREGS+1        ;CLEAR ALL GENERAL-PURPOSE REGISTERS.
           MOVWF   FSR             ;THIS ROUTINE WAS WRITTEN BY DON LEKEI.
           MOVLW   LASTGP-GPREGS   ;
           MOVWF   GPREGS          ;
                                   ;
   CLRRAM  CLRF    USEFSR          ;
                                   ;
           INCF    FSR             ;
           DECFSZ  GPREGS          ;
           GOTO    CLRRAM          ;

For the 16C74:

   FRSTGP0 EQU     020H
   LASTGP0 EQU     07FH

           MOVLW   FRSTGP0     ;PREPARE TO ZERO ALL GENERAL-PURPOSE
           MOVWF   FSR         ;REGISTERS.

   CLRRAM  MOVLW   LASTGP0+1   ;ARE WE POINTING PAST THE FINAL PAGE-0
           XORWF   FSR,W       ;REGISTER?

           SKPNZ               ;IF NOT, SKIP AHEAD.

           BSF     FSR,BIT5    ;OTHERWISE, ADJUST FSR TO SKIP OVER THE PAGE-1
                               ;SPECIAL-PURPOSE REGISTERS.

           CLRF    USEFSR      ;ZERO THE REGISTER AT WHICH WE'RE POINTING.

           INCFSZ  FSR         ;HAVE WE DONE THEM ALL?
           GOTO    CLRRAM      ;IF NOT, LOOP BACK AND ZERO ANOTHER.

In addition to the equates shown in the above code fragments, you should be
aware that "USEFSR" is my name for the indirect register (register number 0);
some Microchip documentation now refers to this register as "INDF".

"FSR", of course, should be equated to the appropriate register (this is left
as an exercise for the reader).

Enjoy...

-Andy

--
Andrew Warren - fastfwdspamKILLspamix.netcom.com
Fast Forward Engineering, Vista, California

1995\08\23@144349 by PETE KLAMMER

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I received on Tue, 22 Aug 1995 18:44:59 from Mike Keitz <.....mkeitzKILLspamspam.....BEV.NET>:

> Subject: Re: Ready for non-window pics
>
> Martin Kirk <EraseMEmlkspam_OUTspamTakeThisOuTasu.edu> wrote:
> >Hi,
> >
> >Will someone please give me a brief list of the requirements for clearing
> >the registers when moving one's code to non-windowed pics?  I assume it
> >is a simple clear all registers operation.  Please confirm.
> >
>
> AFAIK, the non-window PICs have *exactly* the same chip in them as the
> window ones.  So there should be no difference in operation between one type
> and the other, other than inability to erase the non-window one.
>
> (In an earlier thread, someone noted that newer versions of the window chips
> have a non-erasable code protect bit.  So if this bit is set, a windowed
> chip would be non-reusable as well.  Has Microchip issued an exact statement
> on this?)

I have two PIC17C44-JW (windowed) engineering samples, one now a doorstop,
the other now a paperweight.  Microchip did confirm that the code-protect on
these windowed parts is not erasable.  One representative told me that there
is some kind of metal or metalization over those fuses.  Since the dice are
exactly the same in windowed and OTP parts, this is obviously intended to
make it more difficult for a would-be hacker to split open an OTP package
and create his/her own ``window'' to selectively erase the code-protect fuse
of a code-protected part.  When I posted my speculations on the MCHIPBBS
about the implementation (some fuse bits are eraseable, some are not) it was
removed and I was sent a private BBS mail message explaining that management
was understandably touchy about the topic.

The only difference between windowed and non-windowed parts is that an
erased windowed part tends to come up initialized the same way every time,
with zeros in lots of places which should not be relied upon.

Peter F. Klammer, Racom Systems Inc.                   PKlammerspamspam_OUTACM.Org
6080 Greenwood Plaza Boulevard                            (303)773-7411
Englewood, CO  80111                                  FAX:(303)771-4708

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