'Reading Manchester-1 (Bi-phase mark code)'
I need to read a manchester-1 code signal (also called bi-phase mark code). I
was thinking using the CCP module and to detect 1's and 0's measuring T. I'm
not sure if this is the best way to do that. I'll appreciate any information or
advise. I think that the ideal will be use a single chip for that operation,
but I couldn't find any. If anybody know about such a magic IC I'll really
Thank in advance
The Banff Centre for the Arts
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If the stream is slow enough, you might attempt to decode it real time in the
If not, then the standard operation is to use a PLL to regenerate the clock, and
EOR gate to extract the data from the stream. Then surely you could study the
and clock streams with the PIC. I believe that Burr Brown had some decoders at
Chris Eddy, PE
Pioneer Microsystems, Inc.
PABLO MOCHOSKY wrote:
> Hi All.
> I need to read a manchester-1 code signal (also called bi-phase mark code). I
> was thinking using the CCP module and to detect 1's and 0's measuring T. I'm
> not sure if this is the best way to do that. I'll appreciate any information
|On Tue, 31 Mar 1998 13:08:22 -0500 Chris Eddy <NB.NET> writes: ceddy
>If the stream is slow enough, you might attempt to decode it real time
You didn't say what speed the signal is. If it is under 30 Kbps or so
then PIC software alone would be no problem. At higher rates some sort
of external hardware assistance may be needed. Also there is the problem
of the PIC being able to rapidly dispose of data that was received at a
Also, its important to consider the quality of the signal. Is the bit
rate exactly known, or will it vary? Are the transistions in the signal
clean, or are they subject to phase changes and multiple "noisy" rapid
transitions where there should be only one? Such factors determine if
the decoder can be very simple, or if a more complicated one, optimized
for bad signals, is required.
A common simple decoder is built around a one-shot timer of 3/4 the bit
time. A transition in the signal triggers the timer. Further
transitions while the timer is running are ignored. When the timer runs
out, the signal level is sampled and used as the recovered data bit. The
bit may need to be inverted or xor'd with the last one depending on the
exact standard of transmission. If the decoder is in sync, another
transistion will occur 1/4 of a bit time later to restart the timer for
the next bit.
A simple transition detector can be built with an xor gate. One input
receives the signal directly. The other one is delayed by a RC network
(resistor to the signal, capacitor to ground). When the signal level
changes (either low to high or high to low), the inputs to the gate are
momentarily different, which causes the output to pulse high. Once the
capacitor charges to the new signal level, the output returns low again.
These pulses could be captured with a capture timer. A zero bit will
appear as a long time, while a one bit will be measured as two short
times. The capture timer can also be used without a transition detector,
but it's then necessary to reset it for the polarity of the next expected
>If not, then the standard operation is to use a PLL to regenerate the
>EOR gate to extract the data from the stream.
A PLL-based decoder is good for noisy signals that give simple pulse
timers trouble. Often it isn't necessary.
Then surely you could
>and clock streams with the PIC. I believe that Burr Brown had some
If you use external hardware to recover the clock and data, a PIC SSP in
SPI slave mode would be able to rapidly accept them into the PIC 8 bits
at a time.
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