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PICList Thread
'PIC16C84 Interupts'
1998\08\15@071914 by Hans Stevens

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Hi,

On my PIC16C84 project, I use the 4 Interupts: Ext. Int., TMR0 Overflow,
PortB Change Interupt and the EEPROM write complet interupt. Now I wonna
create 4 Interupts vector address.

Example
       ORG 0X010       ;Ext. Int. Vector Adress
       .....
       ....

       ORG 0X020       ;TMR0 Overflow



Have somebody a idea how to do this?

Hans

spam_OUThans.stevensTakeThisOuTspamkhk.be

1998\08\15@110416 by David VanHorn

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>
>On my PIC16C84 project, I use the 4 Interupts: Ext. Int., TMR0 Overflow,
>PortB Change Interupt and the EEPROM write complet interupt. Now I wonna
>create 4 Interupts vector address.
>
>Example
>        ORG 0X010       ;Ext. Int. Vector Adress
>        .....
>        ....
>
>        ORG 0X020       ;TMR0 Overflow
>
>
>
>Have somebody a idea how to do this?



If I understand you correctly, you can't do that.  The '84 only has one
interrupt vector location, you have to check wether the int sources are
enabled, and wether they actually occurred individually.

Other processors have a unique vector for each int, but not this one.

1998\08\15@145521 by Andrew Warren

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Hans Stevens <.....PICLISTKILLspamspam@spam@MITVMA.MIT.EDU> wrote:

> On my PIC16C84 project, I use the 4 Interupts .... Now I wonna
> create 4 Interupts vector address.
>
> Example
>         ORG 0X010       ;Ext. Int. Vector Adress
>         .....
>         ....
>
>         ORG 0X020       ;TMR0 Overflow
>
> Have somebody a idea how to do this?

Hans:

The 16F84 has only a single interrupt vector; to handle
multiple interrupt sources, your interrupt service routine
must check each enterrupt flag individually.

For example:

           ORG     0x0004

           MOVWF   INT_W                  ;SAVE W.

           SWAPF   STATUS,W        ;SAVE STATUS.
           MOVWF   INT_S                  ;

           BTFSS   INTF            ;EXTERNAL INTERRUPT?
           GOTO    CHECKT0         ;IF NOT, JUMP AHEAD.

   ; EXTERNAL INTERRUPT IS PENDING.

           BCF     INTF            ;CLEAN UP.

           ; HANDLE EXTERNAL INTERRUPT HERE...

   CHECKT0:

           BTFSS   T0IF            ;TMR0 OVERFLOW INTERRUPT?
           GOTO    CHECKPB         ;IF NOT, JUMP AHEAD.

   ; TMRO-OVERFLOW INTERRUPT IS PENDING.

           BCF     T0IF            ;CLEAN UP.

           ; HANDLE TMR0-OVERFLOW INTERRUPT HERE...

   CHECKPB:

           BTFSS   RBIF            ;PORTB-CHANGE INTERRUPT?

           [etc....]

-Andy


=== Andrew Warren - fastfwdspamKILLspamix.netcom.com
=== Fast Forward Engineering - Vista, California
=== http://www.geocities.com/SiliconValley/2499

1998\08\15@180030 by Chip Weller

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Andrew Warren Wrote:
{Quote hidden}

(example snipped)
>-Andy

Hans:

Two items I would add to Andys reply:

1. If (and only if) you are going to disable individual interrupts you will
want to check for the interrupt enable bit being set in addition to the
interrupt flag bit. For example if you want to disable the external
interrupt for a critical region (while leaving the global interrupt enabled)
then use:

   btfsc INTCON,INTE        ; test if external interrupt enabled
     btfss INTCON,INTF      ; and set.
       goto CHECKT0

       bcf INTCON,INTF      ; clear interrupt source
       ; process external interrupt actions here.

CHECKT0    ; ...

2. If you will be disabling global interrupts (GIE) then review the methods
that the data sheet recommends for this. A known problem is when an
interrupt occurs during the "bcf INTCON,GIE" instruction the interrupt will
be executed and the "retfie" instruction will then reset this bit on exit
from the interrupt routine. (Not all versions of the 14-bit family have this
problem, so check the data sheet to be sure, but I believe the 16C84 does
have the problem.)

Chip Weller

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