There is a rather clever design in one of phillip/intel/signetics
application notes for one of the 80x52 series. The application is a printer
buffer, and it uses a 256k DRAM as the buffer memory. The clever part is
that the DRAM address lines are driven off IO lines by software, and the
data itself never goes through the processor (it goes from either the
input port to dram, or dram to the output port.) So they manage to drive
the whole 256k of DRAM with a dozen or so IO pins on the microcontroller.
(9 address, RAS, CAS, R/W, ?)
And we all know that 256k is nothing these days. Why, it's even too late to
pick 256k SIMMs from the trash as helpless MAC and PC owners upgrade from
useless 1 and 2M systems to 4 and 8M system. (But some of us accumulated
quite a stash, and it's almost time for the same thing to happen with 1M
SIMMs...)
> If you do not have to access the data very fast you could also "expand"
> the number of I/O lines by adding serial-parallel shift registers to
> use as the address lines for the memory. This would let you use just 2
> or 3 pins on the PIC to create 8, 16, 24, ...? address lines as needed.
> The penalty is you have to shift the address out to the memory before
> each read or write. This is a useful technique for using any micro in
> apps that need lots of digital I/O when extreme speed is not required.
Yeah, I've chosen to use latches on a semi-bus-based system. Good idea
though, I think that the latches will be faster. I can use 8-bits as a
my bus and then use the other pins for selecting latches and doing misc.
control functions to some of the chips.
> > If you do not have to access the data very fast you could also "expand"
> > the number of I/O lines by adding serial-parallel shift registers to
> > use as the address lines for the memory. This would let you use just 2
> > or 3 pins on the PIC to create 8, 16, 24, ...? address lines as needed.
> > The penalty is you have to shift the address out to the memory before
> > each read or write. This is a useful technique for using any micro in
> > apps that need lots of digital I/O when extreme speed is not required.
>
> Yeah, I've chosen to use latches on a semi-bus-based system. Good idea
> though, I think that the latches will be faster. I can use 8-bits as a
> my bus and then use the other pins for selecting latches and doing misc.
> control functions to some of the chips.
>
I have used latches as well but have gotten to where I like the
shift registers better since you can do all the I/O for dozens of
I/O pins using the same 2 or 3 "real" I/O lines on the processor.
That still leaves you some real pins, even on something like the
16C54 that has just a few lines.
> > If you do not have to access the data very fast you could also "expand"
> > > the number of I/O lines by adding serial-parallel shift registers to
> > > use as the address lines for the memory. This would let you use just 2
> > > or 3 pins on the PIC to create 8, 16, 24, ...? address lines as needed.
> > > The penalty is you have to shift the address out to the memory before
> > > each read or write. This is a useful technique for using any micro in
> > > apps that need lots of digital I/O when extreme speed is not required.
> >
> > Yeah, I've chosen to use latches on a semi-bus-based system. Good idea
> > though, I think that the latches will be faster. I can use 8-bits as a
> > my bus and then use the other pins for selecting latches and doing misc.
> > control functions to some of the chips.
> >
>
> I have used latches as well but have gotten to where I like the
> shift registers better since you can do all the I/O for dozens of
> I/O pins using the same 2 or 3 "real" I/O lines on the processor.
> That still leaves you some real pins, even on something like the
> 16C54 that has just a few lines.
If the addresses are normally accessed serially, you can use a PLD,
which you program to work both as a shiftregister and a counter
incrementing on every clock pulse. This way you could get an even
faster system than by using latches, but using only three pins (data,
clock, select_shift_or_count).
Martin Nilsson
Swedish Institute of Computer Science E-mail: mnKILLspamsics.se
Box 1263, S-164 28 Kista Fax: +46-8-751-7230
Sweden Tel: +46-8-752-1574
austin.ibm.com)