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'[PIC]: Timer0 Interrupt, maximum frequency.'
2001\06\23@101849 by Aart

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Hi,

has anybody an idea what will be the maximum freqency on RA4 if i use it as input? With a 20 Mhz Clock (16F84A).

Thx, Aart.

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2001\06\24@080803 by jeethur

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Hi,
I don't think there is any connection between TMR0 and RA4 unless you use
RA4 as
T0CKI (Timer0 with external clock pulses) by setting T0CS in OPTION_REG.

I guess that is what you mean. With a 20 Mhz clock, I'd suggest that you
keep it as low as possible. But it !must! be <= (lesser than or equal to) 4
Mhz (20Mhz /4) . The higher the
external frequency, the harder will it be for the PIC to synchronize its
TMR0 reg with it.

Regards,

Jeethu Rao

{Original Message removed}

2001\06\24@150801 by M. Adam Davis

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According to the data sheet, the input is sampled twice each instruction
cycle (every 2 clock cycles), so to register a change the signal would
have to be slower than 1/4 your oscillator speed.

This, however, is WITHOUT the prescaler.  There are a few frequency
counter designs out there based on the prescaler which go up to 50MHz,
and, I imagine, could go further with careful design.

-Adam

Aart wrote:

{Quote hidden}

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2001\06\24@231741 by Aart

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Thnx Adam for your reply,

a design from Mr. T.Kodama does go to the 38 Mhz using a 10 Mhz Xtal, now i
was thinking about using the double X-tal frequentie (20 mhz) and then it
might go up to the 76 Mhz? (With some modifications to the code). There
aren't any nr's in the datasheet about this. Would this work?

Aart.
{Original Message removed}

2001\06\25@085807 by Bob Ammerman

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My copy of the F84A datasheet makes the timer input requirements very clear,
although they are marked 'preliminary':

Without prescaler:

High and low pulse widths must be Tcy*0.5 + 20ns or more.

At 20Mhz Tcy = 0.20uSec so high and low must each be 0.22uSec (assuming zero
jitter)

This gives a period of 0.44uSec or a frequency of 2.2727+ Mhz.

With prescaler:

High and low pulse widths must be 50ns over full voltage range. This gives a
frequency of 10MHz.

High must be 30ns and low must be 20ns from 3 to 6 volts Vdd. This gives
frequency of 20Mhz.

Anything beyond this is 'out-of-spec'.

Bob Ammerman
RAm Systems
(contract development of high performance, high function, low-level
software)

{Original Message removed}

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