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'[OT]Re: LM313'
1999\04\17@204508 by mdelong

"" wrote:

> Once you get bored with this, try to drive a graphic LCD without the
> controller, just for fun. ;)

How, could you please provide more details?


Mike DeLong

1999\04\17@215933 by ns

On Sun, 18 Apr 1999, Bancherd(Mike) DeLong wrote:

> "" wrote:
> >
> >
> > Once you get bored with this, try to drive a graphic LCD without the
> > controller, just for fun. ;)
> >
> How, could you please provide more details?
> Regards,
> Mike DeLong

I have only tried with surplus monochrome LCDs, where data is not
available or is a bad scan of a poor photocopy of a document in broken
english.  Eventually you get the correct data or data for a similar

You'll get a display with the _drivers_ already installed,
which takes care of the high numbers of row lines and column lines, and
the voltages used to drive them, also included is a timing controler
chip, which simplifies things for the controller. MChip makes micros to
control smaller LCDs directly like this, but not 128x64 scale graphic
size.  Their appnote/data is worth reading. The drivers go between the
LCD and the _controller_.

The controller is like a video card that refreshes the driver states 70
times per second.  Different manufacturers of LCDs have different but
similar timing.  They are all serial, digital, have row sync called
'CLK1', horizontal data latch signal called 'CLK2', first line
marker signal called 'FLM', and maybe an inverter signal called 'M'.
The data bits are D0-D3.

CLK1 is clocked at the beginning of each row. To signal that this is the
first row (each refresh), you also put 'FLM' (first line marker) high
for the falling edge of CLK1, then bring FLM low for the rest of the

CLK2 is the horizontal sync, and each pixel/data bit is latched on it's
falling edge.  The pixels are fed in serially, usually four bits at a
time.  The exact layout of each bit to where it arrives on the screen
depends on the display.  They might be displayed four in a row on the
current row, four in a column, one in each of four quadrants of the
screen etc.

All displays need M, has to do with LCDs needing AC drive.  You just
invert M at each refresh cycle, ie, invert it every time you assert FLM.
Since it is just like a toggle flip flop, some displays integrate it into
the timing chip for you.  If you have to generate it yourself, make sure
you do because LCDs are damaged by DC.  Make sure M is toggling properly
before you apply the LCD drive voltage (usually negative 13V or so).

Then you have to take care of your display memory, read it, serialize the
data so it can be fed out to the display.  The controller must allow the
host CPU to write to the display memory in some way.  Most controllers
have character generators on-board if the user needs them.  CLK2 is the
fastest, and will be in the 1MHz range for bigger displays.

PICs can do all this, but without time for anything else, unless you run
them at 40MHz, even then you don't have time for much else. One example in
Circuit C. Inc (don't have link) using a PIC, generated display data
internally, so the lack of spare CPU wasn't a problem.  Controllers are
best made out of CPLD or FPGA if you want higher performance /
flexibility.  Try for FPGA

I am currently trying to make a 'Universal digtal display controller'
which uses an 8 bit RAM.  It basically just clocks out an 8 bit data
stream at a 1/8th or 1/16th the input clock rate.  The host CPU can access
the RAM and writes the data into it such that different bits in the data
stream form the control signals.  It is inefficient because two bytes are
required to generate a clock (like CL2), also requires more CPU
intelligence. 8 bits should allow for all LCD displays, CGA, EGA, MGA?
Some will require 1-2Mbyte memories though, so will try to use DRAM.  I am
using a 32 I/O pin, 64 macrocell CPLD(cheap), and I don't think it's going
to fit.

So anyway, good luck, and enjoy using graphic LCDs without controllers.

Timeline has them _with_ controllers :

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