David:
See my comments at ##### in the code.
Been there done EXACTLY that :-(
David Duffy wrote:
{Quote hidden}>
> Tony wrote:
> >David Duffy wrote:
> > > bsf wren ;enable eeprom writing
> > > movlw h'55' ;
> > > movwf eecon2 ;eeprom write unlock sequence
> > > movlw h'aa' ;
> > > movwf eecon2 ;eeprom write unlock sequence
> > > bsf wr ;initiate data eeprom write
> > > bcf wren ;disable the eeprom writing
> >
> >
> >This last line probably kills the write routine.
> >
> >Try leaving WR set until the write is completed.
>
> I put the wrong version in my last email - corrected one is;
>
> ;******************************************************************************
> ;* 'ee_write' writes one byte. *
> ;* enter with eeprom address in w and eeprom data in eedata (bank 2). *
##### Instead put the data in a tempory location. I will call
##### it "EETemp"
> ;******************************************************************************
##### Make sure that your banks are correct. They sound wrong to me.
> ee_write: ;
> bank2 ;bank 2
> movwf eeadr ;set up eeprom address
##### This store writes over the previous value that is being
##### used to write to the EEPROM if two writes are done quickly.
##### Storing the data ahead of the test for the EEPROM being
##### ready will causes the same problem.
> bank0 ;bank 0
> ew_busy: ;
> btfsc ee_busy ;is the eeprom busy from a previous write?
> goto ew_busy ;yes, loop & wait
##### Do the stores after the EEPROM is ready
##### Set the bank
##### Bank2
##### movwf eeadr ;set up eeprom address
##### Now Store the data
##### movf EETemp,W
##### movwf eedata
{Quote hidden}> bcf gie ;no, disable the global interupt
> bank3 ;bank 3
> bcf eepgd ;make it a data eeprom write
> bsf wren ;enable eeprom writing
> movlw h'55' ;
> movwf eecon2 ;eeprom write unlock sequence
> movlw h'aa' ;
> movwf eecon2 ;eeprom write unlock sequence
> bsf wr ;initiate data eeprom write
> bank0 ;bank 0
> bsf ee_busy ;set flag to say eeprom is busy
> bsf gie ;re-enable the global interupt
> return ;exit
>
> If I put a 12ms delay in just before the return it works ok.
> I'm now clearing the WREN bit in the interrupt routine.
> My flag (ee_busy) is also cleared in the same spot.
> Regards...
>
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