by Nick de Smith of
used here by permission.
Minor modificatons (which are probably to blame for any bugs) by James Newton.
This page calculates approximations to the ANSI/IPC-D-275 and IPC-2221 design standards for PCB trace width.
The approximations and rationale are described in Temperature Rise in PCB Traces, equations 13 & 15. by Douglas Brooks, UltraCAD Design, Inc. The original idea for this approach was from Brad Suppanz.
The figures returned by this calculator are to be taken as a guide only. I will not be held responsible for any mishap or loss, either direct or consequential, that may occur as a result of relying on the figures herein.
The trace width formulas are:
I = 0.0150 x dT 0.5453 x A0.7349 for internal traces
I = 0.0647 x dT0.4281 x A0.6732 for external traces
I = maximum current in Amps
dT = temperature rise above ambient in °C
A = cross-sectional area in mils2;
The values calculated here compare very closely with those derived by the UltraCAD PCBTEMP utility, and like the diagrams in the standards documents, are valid up to 35A, 400mil traces and a maximum temperature rise of 100°C.
I've added a recommended track clearance value based on the UL rule:
clearance in inches = 0.023" + (0.0002" x V)
The formulae as it stands is simplistic, but is reasonable for V > 50. Note that there are many international standard for this sort of thing, e.g. EN60065:1994, which for European mains of 230V, allows for about 120mil for Class I (protected by earthing) and 240mil for Class II (double isolated). Note that if there is no conformal coating and the environment is dirty/humid/condensing then all bets are off. Please read the standards documents yourself.
Ideally, keep "hot" and "cold" areas of your board well apart.
Change a value in an input field, then press TAB to move to the next field. The results tables will be updated automatically.
|file: /Techref/pcb_traces.htm, 11KB, , updated: 2008/2/20 16:27, local time: 2018/1/23 09:46,
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