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SFR explanation for PIC16F628(3)

PIE1 ( Peripheral Interrupt Enable register ) 8Ch This register contains the enable bits for various preipheral interrupts. The value in the parenthesis is in the condition immediately after the turning on. EEIE : EE Write Complete Interrupt Enable Bit ( Located on PIR2 in case of PIC16F873 ) 1 : Enables the EE write complete interrupt 0 : Disables the EE write complete interrupt CMIE : Comparator Interrupt Enable bit ( This bit is newly provided for PIC16F628 ) 1 : Enables the comparator interrupt 0 : Disables the comparator interrupt RCIE : USART Receive Interrupt Enable bit ( Same as PIC16F873 ) 1 : Enables the USART receive interrupt 0 : Disables the USART receive interrupt TXIE : USART Transmit Interrupt Enable bit ( Same as PIC16F873 ) 1 : Enables the USART transmit interrupt 0 : Disables the USART transmit interrupt CCP1IE : CCP1 Interrupt Enable bit ( Same as PIC16F873 ) 1 : Enables the CCP1 interrupt 0 : Disables the CCP1 interrupt TMR2IE : TMR2 to PR2 Match Interrupt Enable bit ( Same as PIC16F873 ) 1 : Enables the TMR2 to PR2 match interrupt 0 : Disables the TMR2 to PR2 match interrupt TMR1IE : TMR1 Overflow Interrupt Enable bit ( Same as PIC16F873 ) 1 : Enables the TMR1 overflow interrupt 0 : Disables the TMR1 overflow interrupt