SX User’s Manual Rev. 3.1 112 © 2000 Scenix Semiconductor, Inc. All rights reserved. www.scenix.com Chapter 3 Instruction Set 3.6.42    RETI Return from Interrupt Operation: restore W, STATUS, FSR, and program counter from shadow registers Bits affected: STATUS register restored, which affects all bits Opcode: 0000 0000 1110 Description: This instruction causes a return from an interrupt service routine. It restores the 12-
bit program counter value that was saved when the interrupt occurred. This causes
the program to return to the point in the program where the interrupt occurred. The
instruction also restores the contents of W, STATUS, and FSR registers that were
saved when the interrupt occurred. Cycles: 2 in “compatible” mode (SX18/20/28AC and SX18/20/28AC75 only), or 3 in “tur-
bo” mode Example: org 0 ;interrupt routine at address 000h mov M,#$09 ;set up MODE register to access WKPND_B clr W ;clear W mov !RB,W ;exchange W and WKPND_B contents and W,#$0F ;mask out unused bits of WKPND_B mov $1A,W ;move pending bits to register 1Ah ... ;test pending bits perform service reti ;return from interrupt This is an example of an interrupt service routine that services interrupts triggered
on the RB0, RB1, RB2, and RB3 pins. When an interrupt occurs, the device saves
the 12-bit contents of the program counter and the contents of the W, STATUS, and
FSR registers into a set of shadow registers. The program then jumps to the interrupt
service   routine,   which   starts   at   address   000h.   The   interrupt   service   routine
determines the cause of the interrupt, clears the applicable interrupt pending bit,
performs the required task, and ends with the “reti” instruction. The  “reti”  instruction  restores  the  contents  of  the  program  counter  and  the  W,
STATUS, and FSR registers. This causes the device to continue program execution
at the point where the program was interrupted.